Moore’s law has been confirmed by the significant advancements achieved in the electronic area, which have caused digital signal frequencies that travel through various types of printed circuits to increase rapidly. With the growing adoption of Ethernet interfaces and network switches in automotive, industrial, and Internet of Things (IoT) applications, this trend is anticipated to continue in the future, with transmission data speeds equal to or greater than 1 Gbps. Consider wearables or electro-medical devices as examples of electronic applications where the progressive form factor reduction and rise in data transmission rate necessitate careful circuit design beginning with the PCB to ensure the integrity of the signal under all operational situations. The demands that designers must achieve in these applications include high signal transmission speeds, minimal insertion loss, and narrow margins of error. Any printed circuit with high frequency signals must operate with signal integrity; it is not a choice.
What is signal integrity?
In order to maintain the integrity of the electrical signals that pass over the traces of a PCB, i.e., their values of voltage, current, and their trend over time, we refer to a collection of design, analysis, and verification operations as signal integrity. This feature is crucial in digital printed circuits with high-frequency transmission lines (clocks) that are susceptible to interference and noise. It is common to find signals in contemporary electronic circuits with rising or falling edges of the order of a few tens of picoseconds; this necessitates that, in order to prevent signal distortions, the PCB traces be constructed with a high bandwidth and without affecting the spectral components. One of the primary reasons of crosstalk is a highly abrupt rise or fall in the signal’s rising and falling edges, which must be carefully taken into account. Signal integrity is now a standard requirement for electronic circuits that use highly integrated digital components, such as microprocessors, FPGAs, SoCs, high-speed bus, and DDR memories, whereas in the past it was only necessary to meet it for a select few applications (military, avionics, telco, and medical).
EMI vs signal integrity
Anyone who builds devices for industrial use, or that in any event need certification from some accredited authorities before they can be marketed, is aware of how important it is to take electromagnetic compatibility concerns into account from the very beginning of PCB creation (EMI). EMI focuses on ensuring that specifications for the appropriate level of immunity to interference produced by nearby equipment are met and that related tests are passed. On the other hand, the integrity of the signal seeks to prevent signal quality deterioration in order to completely rule out the possibility of distortions or mistakes in the transmission of digital signals.
In terms of the signal integrity requirement, the objective is to design PCBs with clear signals and appropriate operating margins (related to possible variations in the clock frequency, supply voltage or environmental conditions). Signal reflections, crosstalk, ground bouncing, and coupling phenomena are the key problems. The signal may experience aberrations, which are typically on the scale of a few millivolts or milliamps. Figure 1 illustrates a distortion example that might possibly compromise the signal’s integrity. In this case, the distortion was created on the rising and falling edges of a square wave signal.
Instead, EMC concentrates on the entire system in order to fulfil the demands placed by the relevant EMC tests and guarantee that the application functions as intended. The key issues are electromagnetic compatibility, immunity, and emissions, with signal levels for immunity and emissions on the scale of a few kilovolts or amperes. This means that the parameters needed to achieve the signal integrity requirement have values that are much higher than those needed to satisfy emissions requirements but lower than those needed to satisfy immunity requirements. Even though they are distinct, the two systems really employ similar methods for PCB design, which will now be examined.
How can signal integrity be improved?
Definition of stackup
Finding the ideal balance between cost, size, and signal integrity will determine the quantity, kind, and placement of the many layers that make up the PCB. In order to provide effective impedance management, the basic guideline to follow is to insert power and ground planes capable of providing a return path to ground for each signal. These planes should, if at all feasible, be arranged uniformly throughout the stackup so that at least one of them is next to each signal layer and is free of any gaps or breakpoints that could alter the signal flow. The characteristics of the materials being utilised are also important, therefore it is important to carefully consider the copper, dielectric, and dielectric constant thicknesses. For circuits with fast propagation, it is not necessarily desirable to utilise typical materials, such the conventional FR-4. In these circumstances, it is best to choose laminates with low dielectric constants (Dk), which can lessen signal distortions and phase changes. The Rogers laminates, like Rogers RO4350, are one illustration. Even though they are more expensive than FR-4, materials of this category have special qualities for high frequencies.
Impedance regulation
To ensure that the signal strength along a trace stays within set bounds, impedance management involves determining the ideal connection between the size/position of the PCB traces and the characteristics of the substrate. The stronger the connection, the stronger the signal. On the other hand, poor coupling causes power losses and subsequent signal integrity problems.
PCB traces need to be uniformly shaped in order to maintain a constant dielectric constant along the whole trace and provide a good impedance coupling. By adjusting the track width and utilising a specialised calculator, which is readily accessible online, the designer may determine the impedance value. Signal reflections may happen and cause a return of the signal to its place of origin if the designer disregards this factor. This lessens the signal’s intensity at its final location and the production of electromagnetic interference. Multilayer PCBs require special attention since it is possible for a trace to cross from one layer with, example, a 40- impedance to a neighbouring layer with a 50- impedance, reflecting the signal. When a trace penetrates many layers, effective impedance management must guarantee that the impedance stays constant at all points along the trace. The eye diagram, which shows any signal distortions along the transmission line, is a reliable tool for rapidly and intuitively assessing the quality of a digital signal. A sample eye diagram for a situation of good signal integrity is shown in Figure 2 together with a case of poor signal integrity (image on the right).
PCB design
Designers should concentrate on the traces conveying high-speed signals, particularly on the courses taken by the signals between the point of origin and destination and the paths of return to ground, in order to maintain adequate signal integrity. The following are the major guidelines to follow for good signal routing:
- Steer clear of right angles on the traces since they raise the potential for parasitic interference there, which might change the impedance and result in signal reflections. Instead, 45° angles or, even better, curved parts, must be selected.
- For the same reasons as in the preceding paragraph, avoid abusing the usage of through holes. Additionally, they lengthen the trace.
- Distinguish between digital and analogue signals that are high-speed from those that are low-speed; on neighbouring layers, route high-speed signals perpendicular to one another to minimise crosstalk.
Crosstalk
Crosstalk occurs when signals crossing neighbouring lines on a printed circuit board couple unintentionally (inductively or capacitively). Crosstalk can result in a large signal quality reduction in the case of high-speed transmissions, which is sometimes very challenging to identify in a predictable and repeated manner. The traditional approach to this issue is to space the high frequency/high speed traces correctly, utilising any extra intermediate space for the less important traces. Since the coupling effects are inversely proportional to the square of the distance between the tracks, wider spacing has an immediate advantage.
