Despite PCB technological developments, there are still some significant issues with signal and power integrity in today’s high-frequency and high-speed systems. It is a very difficult and sophisticated process for PCB designers to resolve power and signal integrity problems in a PCB. If not adequately addressed, problems with higher device integration, lower IC supply voltages, narrower spacing on the PCB, etc., can seriously affect how well circuits perform. Engineers may now solve problems, such as power and signal integrity problems, by employing a variety of simulations and simulation tools.
PCB Signal Integrity
Signal integrity (SI) is the ability of a signal to move across a PCB circuit with little to no distortion. Signal integrity quantifies the overall degree of signal deterioration that occurs while a signal travels from the transmitter to the receiver. These problems are not present at lower frequencies, but they must be taken into account when constructing circuits with higher frequencies (>50 MHz). As signal integrity also refers to the caliber of a signal that travels down a transmission line, both analog and digital parts of the signal must be taken care of at higher frequencies.
Figure 1: Signal Integrity in PCBs
Source – https://www.protoexpress.com/blog/wp-content/uploads/2020/08/Comparison-between-original-and-deviated-signal-while-transmission.jpg
There are many levels of signal distortion that take place as it travels from source to receiver. This occurs as a result of a number of factors, including crosstalk, jitter, and impedance mismatch. To guarantee that the original signal is received at the destination with the least amount of distortion feasible, circuits must be built with the primary goal of minimizing these variables. Additionally, it should be confirmed that the electronic circuitry’s post-manufacturing analysis of the signal quality and control of undesirable outputs.
Signal Integrity Issues and Their Influencing Factors
When the frequency of a circuit is raised (to RF and higher), signal integrity becomes a significant problem. The following are some of the elements that can affect signal integrity problems.
- Signal degradation caused by uncontrolled line impedances: The parameters of the signal trace and its return path are the key determinants of signal quality on a given network. Ringing and signal distortion are caused by reflections in the transmission line when the signal encounters imbalances in the line’s impedance during transmission. Signal distortion will get worse as signal rise time is longer due to variations in uncontrolled line impedances. Reduction or elimination of reflections on line impedance changes helps minimize signal distortion.
- Signal degradation due to other impedance discontinuities: Discontinuities in the impedance of the transmission line will occur at the point of encountering one of the following situations. When a via is encountered by a signal in its path, when branching of the signal takes place into two or more lines, when there is a discontinuity in a signals’ return path. Eg: Split in a plane, when there is a termination at the receiver end by a signal line, when transmission paths and return paths are joined to connector pins.
Figure 2: Degradation in signal due to impedance discontinuities Source – https://www.protoexpress.com/blog/wp-content/uploads/2020/04/Impedance-discontinuity.jpg
- Signal deterioration caused by propagation delay: Signals travel a finite distance on a PCB from source to receiver. On particular layers of a PCB, signal delays are inversely correlated with signal speed and directly correlated with signal line length. If the overall delays of the clock and data signals do not match, the receiver would detect the signals at separate times. These delays cause skews, and when there is too much skewness, there are more sampling errors. larger signal speeds will result in larger sample rates, which will increase the likelihood of errors owing to skews.
- Signal attenuation causes signal degradation because it results in losses from conducting trace resistances and the dissipation factor (Df) of the dielectric material during propagation along PCB lines. Higher frequency signal components will be attenuated more than lower frequency signal components since these losses grow as frequency rises. Errors in data detection are inevitable. A decrease in signal bandwidth results in an increase in the signal’s distortion, which worsens the signal and raises excessive signal rise times.
- Crosstalk noise’s deterioration of the signal: There is a chance that the path plane could come into contact with adjacent signal lines during a fast voltage or fast current transition on a signal line, which would result in crosstalk—an unwanted mingling of signals. On signal lines, this crosstalk causes crosstalk noise. Mutual capacitance and inductance between the traces are the main causes of this. Increased spacing between PCB traces reduces inductive and capacitive coupling. The engineer’s rule of thumb states that there should be three times as much space as trace width, and that signals with faster rise times are more likely to produce crosstalk and switching noise.
Figure 3: Degradation of signal due to crosstalk Source – https://www.protoexpress.com/blog/wp-content/uploads/2020/04/what_is_crosstalk_edit.png
Methods to improve signal integrity
Signal lines and signal return pathways must behave as uniform transmission lines with uniform control impedances, according to designers. Uniform planes must be positioned near to the signal layers on signal return pathways. The source and receiver impedances on controlled impedance signal lines must match. By using smaller microvias and HDI PCB technology, integrity can also be increased by reducing the effects of discontinuities created by vias and via stubs. By using differential signaling and tightly linked differential pairs, which are more resistant to interruptions in signal return pathways, signal integrity can be maintained throughout. Lines must be kept as short as possible and signal return pathways should be as wide as possible when linking ends in a PCB signal. Since they are frequently used to transmit signals from one PCB to another or to transfer data from one PCB to another source from the unit, the connectors must be located where discontinuities occur. Downloading an S-parameter file for a path is crucial for simulation. Before using the data in simulation, the data’s quality must first be examined. Designers can inspect the information in the S-parameter file and the process is made simpler by programs like ADS’s S-parameter.
Power integrity in PCBs
Power integrity is one of the crucial issues that must be taken into account while developing PCBs. Voltage Regulator Modules (VRMs), which operate as one or more power supply, produce the circuit board voltages.VRMs provide the various devices and components on a PCB board with the maximum currents and voltages needed. The numerous planes, traces, solder balls, and other components in the PCB as well as all the interconnects from the VRMs to the terminals or various components (capacitors, ICs, etc.) are contained in the Power Distribution Network (PDN).
Figure 4: Power Integrity in PCBs Source – https://www.protoexpress.com/wp-content/uploads/2021/08/typical_PDN_topology.jpg
PDN effects on power stability
Only if PDN impedance can be lowered throughout the largest possible bandwidth will the transient voltage response when PDN is activated with a current pulse be reduced. The resultant transient voltage, which can be calculated using the inverse Fourier transform of Ohm’s law, is stated in the equation above. Electrical noise produced by PCB components, signals, power sources, and ground planes can interfere with a PDN’s ability to function. The following are some ways that PDN noise can compromise a PCB’s ability to work properly:
- Circuit malfunction results from changing voltages provided to ICs and other components when the level of noise on a PDN exceeds a predetermined threshold.
- Even if the voltages provided to the components are within the tolerance range, PDN noise may still result in other problems. Crosstalk on signal lines appears at the output as a result of the input power source line being transferred to the VRMs input.
- The largest conducting surfaces that can transport huge currents on a PCB are the PDN interconnects. Any high-frequency PDN noise has a risk of Electromagnetic Compatibility (EMC) failure and the potential to generate a lot of electromagnetic radiation.
Methods to improve Power integrity
During the process of PCB design, it is very important for designers to pay detailed attention to the following factors that will provide good power integrity in a circuit.
- Configuration of the layers in a board stack-up: A board’s Power Distribution Network must be connected to the configuration of the layers in a board stack-up. Wherever sensitive signal routing is required, ground layers of a PCB must be positioned in order to enable microstrip and strip-lying layer topologies. This offers shielding from Electromagnetic Interference (EMI) as well as crisp, clear signals from the return pathways. It is crucial to plan the circuit’s plane layers so that power is distributed evenly throughout all of the circuit’s components by dividing the layers for different voltages.
- Component placement: In order to make sure that components receive their required power, reference voltages must be carefully managed in the PDN. Multiple bypass capacitors must be added to stabilize the PDN from different high-power consuming components like processors, CPUs, etc that consume a lot of power. Capacitors must be placed as close as possible to the power pins in order to avoid issues of heat sinks. Power sections of the circuitry must be kept isolated to block power supply noise interfering with analog and digital signals in the circuit.
- Trace routing: The traces must be as short as feasible when power pins are routed to bypass capacitors. When power supplies are to be routed, traces must be kept short, wide, and at a 45-degree rounded corner. Therefore, wider traces are required in order to enhance the current and temperature of power nets. Analog and digital routing must be kept away from the power supply area to protect them from that noise, much like component placement.
- Planes: Designers should use solid planes for grounding rather than routing ground via traces. For high-speed transmission lines, this creates clear signal routes and aids in power integrity and thermal control. When designing, care must be taken to avoid using cuts, splits, or a lot of vias to obstruct the clean signal routes. Outlines that will increase EMI shielding must be included when ground planes are built.
Engineers must take into account a number of important variables as they design electronic circuits since signal and power integrity designs are becoming more complex. Signal integrity requires taking the required precautions to prevent issues like distortion, impedance changes, signal reflections, etc. these can be accomplished by using uniform transmission lines, which will give the circuit uniform control impedances. Additionally, consistent planes close to the signal layers should be present on signal return pathways. Signal return channels must be as wide as possible and signal lines must be constructed to be as short as possible. Before mass manufacturing, simulation tools can help you better understand the characteristics of the circuit and its outputs. On any simulation software, PCBs and components must be chosen with the appropriate characteristics. When it comes to power integrity, components must always receive the desired amount of power for the circuit to function. To ensure that heat dissipation proceeds without hiccups and that signal interference is avoided, it is essential to use the proper component arrangement procedures. With the aid of simulation tools, power integrity can be examined and rectified as necessary, similar to how signal integrity is. The designers can visualize voltage drops in a PDN with the aid of this program. Traces must be short, wide, and placed with a 45-degree rounded corner for routing power supplies. When building ground planes, outlines should be taken into account for better EMI shielding.